In the field of microelectronics, an electrostatic discharge can occur throughout the lifetime of an integrated circuit and constitutes a real problem with regard to the reliability of that integrated circuit as well as a major cause of failure.
An electrostatic discharge generally results in a more or less large and more or less short current peak. An ESD protection device must therefore evacuate this current peak. Moreover, this current peak gives rise to a thermal constraint in the protection device.
A conventional ESD protection element comprises a triac. The production of such a protection element using a technology of the solid substrate type easily allows the dissipation of the heat generated by the ESD pulse through the contacts and the solid substrate in which the protection element is produced.
There are however other types of technologies and in particular the technologies using a substrate of the silicon on insulator type. Such a substrate comprises a layer of silicon placed on top of a buried oxide, commonly referred to by the acronym “BOX” (Buried OXide) by those skilled in the art. The components are then produced in this silicon layer.
In a partially depleted SOI (PDSOI: Partially Depleted SOI) technology with a technology node of 65 nm, the thickness of the buried oxide is of the order of 145 nm and that of the silicon layer on top of this buried oxide is of the order of 60 nm.
In a fully depleted SOI (FDSOI: Fully Depleted SOI) technology, the thickness of the buried oxide is variable as is that of the silicon layer. By way of indication, the thickness of the buried oxide can be of the order of 145 nm and that of the silicon layer on top of this buried oxide can be of the order of 7 nm. Thinner thicknesses are also possible, for example of the order of 10 or 20 nanometers for the buried oxide.
In an SOI technology, the presence of the buried oxide prevents the evacuation of heat in the downward direction that is to say through the silicon situated under the buried oxide, thus reducing the volume available for this thermal evacuation. Moreover, in the FDSOI technology, the very low volume available has a negative impact on the reliability of the triacs produced in the thin upper layer of silicon.
What is needed, then, is a device that overcomes at least some of the shortcomings of the prior art devices.